LIBRARY IEEE;
USE ieee.std_logic_1164.all;

ENTITY fingerprint is
port (
    i_Clk       : in  std_logic;
    i_TX_DV     : in  std_logic;
    i_TX_Byte   : in  std_logic_vector(7 downto 0);
    o_TX_Active : out std_logic;
    o_TX_Serial : out std_logic;
    o_TX_Done   : out std_logic;
    i_RX_Serial : in  std_logic;
    o_RX_DV     : out std_logic;
    o_RX_Byte   : out std_logic_vector(7 downto 0)
    );
END fingerprint;

ARCHITECTURE BEHAVIOR OF fingerprint IS

COMPONENT UART_TX
port (
    i_Clk       : in  std_logic;
    i_TX_DV     : in  std_logic;
    i_TX_Byte   : in  std_logic_vector(7 downto 0);
    o_TX_Active : out std_logic;
    o_TX_Serial : out std_logic;
    o_TX_Done   : out std_logic
    );
END COMPONENT;

COMPONENT UART_RX
  port (
    i_Clk       : in  std_logic;
    i_RX_Serial : in  std_logic;
    o_RX_DV     : out std_logic;
    o_RX_Byte   : out std_logic_vector(7 downto 0)
    );END COMPONENT;
BEGIN

UT : UART_TX PORT MAP(i_Clk=>i_Clk,i_TX_DV=>i_TX_DV,i_TX_Byte=>i_TX_Byte,o_TX_Active=>o_TX_Active,o_TX_Serial=>o_TX_Serial,o_TX_Done=>o_TX_Done);
UR : UART_RX PORT MAP(i_Clk=>i_Clk,i_RX_Serial=>i_RX_Serial,o_RX_DV=>o_RX_DV,o_RX_Byte=>o_RX_Byte);
END BEHAVIOR;
